|top_level
A0_BYTE <= ix2975_lc.DB_MAX_OUTPUT_PORT_TYPE
A1_BYTE <= ix2976_lc.DB_MAX_OUTPUT_PORT_TYPE
ADD10 => MEM_MAP_REG_notri:I3_notri.ADD10_ix5785[6]
ADR[0] => MEM_MAP_REG_notri:I3_notri.PRFRLAD[5]
ADR[1] => HHWIL_DSP.DATAIN
ADR[1] => MEM_MAP_REG_notri:I3_notri.PRFRLAD[4]
ADR[2] => HCNTL0_DSP.DATAIN
ADR[2] => MEM_MAP_REG_notri:I3_notri.PRFRLAD[3]
ADR[3] => HCNTL1_DSP.DATAIN
ADR[3] => MEM_MAP_REG_notri:I3_notri.PRFRLAD[2]
ADR[4] => MEM_MAP_REG_notri:I3_notri.PRFRLAD[1]
ADR[5] => MEM_MAP_REG_notri:I3_notri.PRFRLAD[0]
AUTOZERO => ix2761.DATAA
B_DATA_CS_n <= ix2981_lc.DB_MAX_OUTPUT_PORT_TYPE
BBCS9_n <= CS9_n.DB_MAX_OUTPUT_PORT_TYPE
BCS9_n <= ix2977_lc.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_CLK <= QSPI_CLK.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_CLK_TEMP <= I0_tri_BQSPI_CLK_TEMP.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_DOUT <= QSPI_DO.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_DOUT_TEMP <= I0_tri_BQSPI_DOUT_TEMP.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_DSP_CS_n <= ix2978.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_DSP_DATA2CPU => ix2762.DATAA
BQSPI_PER_CS_n <= ix2979_lc.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_PER_DATA2CPU => ix2870.DATAA
BQSPI_TEMP_CS_n <= ix2980_lc.DB_MAX_OUTPUT_PORT_TYPE
BQSPI_TEMP_DATA2CPU => ix2762.DATAB
BSPI_CLKX0 => refmachine:I20.DSP_SPI_SCLK
BSPI_DR0 <= refmachine:I20.DSP_SPI_DI
BSPI_FSX0 => refmachine:I20.DSP_SPI_CS
CE_ADC_PAR_READ_n => ix2823.DATAA
CE_ADC_PAR_READ_n => ix3034.DATAA
CE_ADC_PAR_READ_n => ix3035.DATAA
CE_ADC_PAR_READ_n => ix3036.DATAA
CHARTMARK => ix2877.DATAA
CLOCK => refmachine:I20.CLOCK
CLOCK => LPM_COUNTER:I13_i_ix8.clock
CLOCK => I13_reg_CLK500HZ.CLK
CLOCK => I21_reg_mw_I11reg_cval.CLK
CLOCK => I21_reg_mw_I13reg_cval.CLK
CLOCK => I21_reg_mw_I14reg_cval.CLK
CLOCK => I21_reg_mw_I16reg_cval.CLK
CLOCK => mw_I22reg_cval.CLK
CLOCK => mw_I22reg_cval_repl1.CLK
COLUMN_STRB_n => ix2826.DATAA
CS5_n => ix2680.DATAA
CS5_n => ix2981.DATAA
CS5_n => ix3032.DATAA
CS9_n => BBCS9_n.DATAIN
CS9_n => ix2691.DATAB
CS9_n => ix2977.DATAB
CS_DAC1_n <= ix2982_lc.DB_MAX_OUTPUT_PORT_TYPE
CS_DAC2_n <= ix2983_lc.DB_MAX_OUTPUT_PORT_TYPE
CS_THERM_n <= SPI_CNTRL:I4.CS_n
DATA[8] <= DATA_tbuf_8
DATA[9] <= DATA_tbuf_9
DATA[10] <= DATA_tbuf_10
DATA[11] <= DATA_tbuf_11
DATA[12] <= DATA_tbuf_12
DATA[13] <= DATA_tbuf_13
DATA[14] <= DATA_tbuf_14
DATA[15] <= DATA_tbuf_15
DIN_THERM <= SPI_CNTRL:I4.DATA2AD
DOUT_THERM => SPI_CNTRL:I4.DATA_FROM_AD
DRDY_THERM_n => SPI_CNTRL:I4.DATA_RDY
DSACK1 <= I21_reg_mw_I16reg_cval.DB_MAX_OUTPUT_PORT_TYPE
DSP_SOFTWARE_RST_n <= ix2984_lc.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_IN[0] => ix3052.DATAA
EMIFDATA_IN[0] => ix3060.DATAA
EMIFDATA_IN[0] => ix3068.DATAA
EMIFDATA_IN[1] => ix3051.DATAA
EMIFDATA_IN[1] => ix3059.DATAA
EMIFDATA_IN[1] => ix3067.DATAA
EMIFDATA_IN[2] => ix3050.DATAA
EMIFDATA_IN[2] => ix3058.DATAA
EMIFDATA_IN[2] => ix3066.DATAA
EMIFDATA_IN[3] => ix3049.DATAA
EMIFDATA_IN[3] => ix3057.DATAA
EMIFDATA_IN[3] => ix3065.DATAA
EMIFDATA_IN[4] => ix3048.DATAA
EMIFDATA_IN[4] => ix3056.DATAA
EMIFDATA_IN[4] => ix3064.DATAA
EMIFDATA_IN[5] => ix3047.DATAA
EMIFDATA_IN[5] => ix3055.DATAA
EMIFDATA_IN[5] => ix3063.DATAA
EMIFDATA_IN[6] => ix3046.DATAA
EMIFDATA_IN[6] => ix3054.DATAA
EMIFDATA_IN[6] => ix3062.DATAA
EMIFDATA_IN[7] => ix3045.DATAA
EMIFDATA_IN[7] => ix3053.DATAA
EMIFDATA_IN[7] => ix3061.DATAA
EMIFDATA_OUT[0] <= I14_I1_tri_DATAOUT_0.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_OUT[1] <= I14_I1_tri_DATAOUT_1.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_OUT[2] <= I14_I1_tri_DATAOUT_2.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_OUT[3] <= I14_I1_tri_DATAOUT_3.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_OUT[4] <= I14_I1_tri_DATAOUT_4.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_OUT[5] <= I14_I1_tri_DATAOUT_5.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_OUT[6] <= I14_I1_tri_DATAOUT_6.DB_MAX_OUTPUT_PORT_TYPE
EMIFDATA_OUT[7] <= I14_I1_tri_DATAOUT_7.DB_MAX_OUTPUT_PORT_TYPE
EOS => EXT_INT_IO_4_DSP.DATAIN
EVENT_OUT1 <= MEM_MAP_REG_notri:I3_notri.W_REG_00005[3]
EVENT_OUT2 <= MEM_MAP_REG_notri:I3_notri.W_REG_00005[2]
EXT_INT_IO_4_DSP <= EOS.DB_MAX_OUTPUT_PORT_TYPE
EXT_INT_IO_5_DSP <= ix2985.DB_MAX_OUTPUT_PORT_TYPE
EXT_INT_IO_6_DSP <= ix2986.DB_MAX_OUTPUT_PORT_TYPE
EXT_INT_IO_7_DSP <= I13_reg_CLK500HZ.DB_MAX_OUTPUT_PORT_TYPE
FAN_PWM <= I8_tri_PWMOUT.DB_MAX_OUTPUT_PORT_TYPE
FLTR_STRB <= MEM_MAP_REG_notri:I3_notri.STRB_W_0001A
FLTR_WHL_DIR <= FILTER_WHEEL_3977:I40.FLTR_WHL_DIR
FLTR_WHL_EN <= FILTER_WHEEL_3977:I40.FLTR_WHL_EN
FLTR_WHL_HOLD <= FILTER_WHEEL_3977:I40.FLTR_WHL_HOLD
FLTR_WHL_RST <= FILTER_WHEEL_3977:I40.FLTR_WHL_RST
FLTR_WHL_STEP <= FILTER_WHEEL_3977:I40.FLTR_WHL_STEP
FUSE_15V => MEM_MAP_REG_notri:I3_notri.R_REG_00008[1]
FUSE_24V => MEM_MAP_REG_notri:I3_notri.R_REG_00008[3]
GP2 <= ix2987_lc.DB_MAX_OUTPUT_PORT_TYPE
HCNTL0_DSP <= ADR[2].DB_MAX_OUTPUT_PORT_TYPE
HCNTL1_DSP <= ADR[3].DB_MAX_OUTPUT_PORT_TYPE
HEATER_PWM <= I8_tri_PWMOUT.DB_MAX_OUTPUT_PORT_TYPE
HHWIL_DSP <= ADR[1].DB_MAX_OUTPUT_PORT_TYPE
HINT_DSP_n => ix2988.DATAA
HRDY_DSP_n => ix2691.DATAA
INJECTSTART => ix2868.DATAA
IRQ5 <= ix2988.DB_MAX_OUTPUT_PORT_TYPE
LAMP_LIT_n => MEM_MAP_REG_notri:I3_notri.R_REG_00008[5]
LAMP_ON <= ix2989.DB_MAX_OUTPUT_PORT_TYPE
LAMPONOFF => ix2876.DATAA
LEAK_DET_PRESENT_n => MEM_MAP_REG_notri:I3_notri.R_REG_00008[7]
LED_LOOP_STRB <= MEM_MAP_REG_notri:I3_notri.STRB_W_00004
MEM_CS_n <= <VCC>
PCS_n[0] => ix2689.DATAC
PCS_n[0] => ix2762.DATAD
PCS_n[0] => ix2870.DATAD
PCS_n[0] => ix2873.DATAC
PCS_n[0] => ix2979.DATAC
PCS_n[0] => ix2980.DATAC
PCS_n[1] => ix2689.DATAB
PCS_n[1] => ix2762.DATAC
PCS_n[1] => ix2870.DATAC
PCS_n[1] => ix2873.DATAB
PCS_n[1] => ix2979.DATAB
PCS_n[1] => ix2980.DATAB
PCS_n[2] => ix2689.DATAA
PCS_n[2] => ix2870.DATAB
PCS_n[2] => ix2873.DATAA
PCS_n[2] => ix2979.DATAA
PCS_n[2] => ix2980.DATAA
PCS_n[2] => ix2990.DATAA
PCS_n_bit3 => ix2742.DATAA
PDABUSY => reg_mw_I12reg_cval.DATAIN
PER_AD_CLK <= INST_PER_AD_CLK.DB_MAX_OUTPUT_PORT_TYPE
QSPI_CLK => BQSPI_CLK.DATAIN
QSPI_CLK => I0_tri_BQSPI_CLK_TEMP.DATAIN
QSPI_DI_n <= ix2990_lc.DB_MAX_OUTPUT_PORT_TYPE
QSPI_DO => BQSPI_DOUT.DATAIN
QSPI_DO => I0_tri_BQSPI_DOUT_TEMP.DATAIN
R_W_BUF <= RD_WR.DB_MAX_OUTPUT_PORT_TYPE
RD_WR => R_W_BUF.DATAIN
RD_WR => ix2680.DATAB
RD_WR => ix2977.DATAC
RD_WR => ix2996.DATAA
RD_WR => ix3032.DATAB
READ_PDA_n <= ix2991_lc.DB_MAX_OUTPUT_PORT_TYPE
REFBUSY => refmachine:I20.AD_BUSY
REFCS_n <= refmachine:I20.AD_SPI_CS
REFSCLK <= refmachine:I20.AD_SPI_SCLK
REFSDATA => refmachine:I20.AD_SPI_DO
RESET_n => I13_reg_CLK500HZ.ACLR
RESET_n => I10_reg_CURRENT_STATE_0.ACLR
RESET_n => I17_reg_CURRENT_STATE_0.ACLR
RESET_n => I11_reg_mw_I0reg_cval.ACLR
RESET_n => I11_reg_mw_I1reg_cval.ACLR
RESET_n => I11_reg_mw_I6reg_cval.ACLR
RESET_n => I11_reg_mw_I12reg_cval.ACLR
RESET_n => mw_I22reg_cval.ACLR
RESET_n => mw_I31reg_cval.ACLR
RESET_n => mw_I32reg_cval.ACLR
RESET_n => mw_I33reg_cval.ACLR
RESET_n => INST_PER_AD_CLK.ACLR
RESET_n => I14_notri_I0_reg_CURRENT_STATE_2.ACLR
RESET_n => I14_notri_I0_reg_CURRENT_STATE_1.ACLR
RESET_n => I14_notri_I0_reg_CURRENT_STATE_0.ACLR
RESET_n => mw_I22reg_cval_repl1.ACLR
RESET_n => ix2679.DATAA
RESET_n => ix2696.DATAA
RESET_n => ix2697.DATAA
RESET_n => ix2703.DATAA
RESET_n => ix2704.DATAA
RESET_n => ix2821.DATAA
RMTVCC_FUSE => MEM_MAP_REG_notri:I3_notri.R_REG_00008[2]
SCLK_DAC_1 <= ix2992.DB_MAX_OUTPUT_PORT_TYPE
SCLK_DAC_2 <= ix2993.DB_MAX_OUTPUT_PORT_TYPE
SCLK_THERM <= SPI_CNTRL:I4.SCLK
SDIO_DAC_1 <= ix3002_lc.DB_MAX_OUTPUT_PORT_TYPE
SDIO_DAC_2 <= ix3011_lc.DB_MAX_OUTPUT_PORT_TYPE
SEL_EN <= TIN0_DSP.DB_MAX_OUTPUT_PORT_TYPE
START_PDA_DSP <= TOUT1_DSP.DB_MAX_OUTPUT_PORT_TYPE
START_REF_DSP <= refmachine:I20.START_REF_DSP
STAT_GRN <= MEM_MAP_REG_notri:I3_notri.W_REG_00005[7]
STAT_RED <= MEM_MAP_REG_notri:I3_notri.W_REG_00005[6]
TIN0_DSP => SEL_EN.DATAIN
TOUT0_DSP => refmachine:I20.REF_START_EXP
TOUT1_DSP => START_PDA_DSP.DATAIN
TPUBUS[9] => FILTER_WHEEL_3977:I40.TPUINPUTS[0]
TPUBUS[10] => FILTER_WHEEL_3977:I40.TPUINPUTS[1]
TPUBUS[11] => FILTER_WHEEL_3977:I40.TPUINPUTS[2]
TPUBUS[12] => FILTER_WHEEL_3977:I40.TPUINPUTS[3]
TPUBUS7 => ix2869.DATAA
TPUBUS8 <= ix2994.DB_MAX_OUTPUT_PORT_TYPE
TRI_REG <= ix2995.DB_MAX_OUTPUT_PORT_TYPE
W_R_BUF <= ix2996.DB_MAX_OUTPUT_PORT_TYPE


|top_level|LPM_COUNTER:I13_i_ix8
clock => alt_counter_f10ke:wysi_counter.clock
aclr => alt_counter_f10ke:wysi_counter.aclr
sclr => alt_counter_f10ke:wysi_counter.sclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
q[2] <= alt_counter_f10ke:wysi_counter.q[2]
q[3] <= alt_counter_f10ke:wysi_counter.q[3]
q[4] <= alt_counter_f10ke:wysi_counter.q[4]
q[5] <= alt_counter_f10ke:wysi_counter.q[5]
q[6] <= alt_counter_f10ke:wysi_counter.q[6]
q[7] <= alt_counter_f10ke:wysi_counter.q[7]
q[8] <= alt_counter_f10ke:wysi_counter.q[8]
q[9] <= alt_counter_f10ke:wysi_counter.q[9]
q[10] <= alt_counter_f10ke:wysi_counter.q[10]
q[11] <= alt_counter_f10ke:wysi_counter.q[11]
q[12] <= alt_counter_f10ke:wysi_counter.q[12]
q[13] <= alt_counter_f10ke:wysi_counter.q[13]
q[14] <= alt_counter_f10ke:wysi_counter.q[14]
q[15] <= alt_counter_f10ke:wysi_counter.q[15]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|LPM_COUNTER:I13_i_ix8|alt_counter_f10ke:wysi_counter
data[0] => counter_cell[0].DATAC
data[1] => counter_cell[1].DATAC
data[2] => counter_cell[2].DATAC
data[3] => counter_cell[3].DATAC
data[4] => counter_cell[4].DATAC
data[5] => counter_cell[5].DATAC
data[6] => counter_cell[6].DATAC
data[7] => counter_cell[7].DATAC
data[8] => counter_cell[8].DATAC
data[9] => counter_cell[9].DATAC
data[10] => counter_cell[10].DATAC
data[11] => counter_cell[11].DATAC
data[12] => counter_cell[12].DATAC
data[13] => counter_cell[13].DATAC
data[14] => counter_cell[14].DATAC
data[15] => counter_cell[15].DATAC
clock => counter_cell[15].CLK
clock => counter_cell[14].CLK
clock => counter_cell[13].CLK
clock => counter_cell[12].CLK
clock => counter_cell[11].CLK
clock => counter_cell[10].CLK
clock => counter_cell[9].CLK
clock => counter_cell[8].CLK
clock => counter_cell[7].CLK
clock => counter_cell[6].CLK
clock => counter_cell[5].CLK
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
aclr => counter_cell[15].ACLR
aclr => counter_cell[14].ACLR
aclr => counter_cell[13].ACLR
aclr => counter_cell[12].ACLR
aclr => counter_cell[11].ACLR
aclr => counter_cell[10].ACLR
aclr => counter_cell[9].ACLR
aclr => counter_cell[8].ACLR
aclr => counter_cell[7].ACLR
aclr => counter_cell[6].ACLR
aclr => counter_cell[5].ACLR
aclr => counter_cell[4].ACLR
aclr => counter_cell[3].ACLR
aclr => counter_cell[2].ACLR
aclr => counter_cell[1].ACLR
aclr => counter_cell[0].ACLR
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
q[5] <= counter_cell[5].REGOUT
q[6] <= counter_cell[6].REGOUT
q[7] <= counter_cell[7].REGOUT
q[8] <= counter_cell[8].REGOUT
q[9] <= counter_cell[9].REGOUT
q[10] <= counter_cell[10].REGOUT
q[11] <= counter_cell[11].REGOUT
q[12] <= counter_cell[12].REGOUT
q[13] <= counter_cell[13].REGOUT
q[14] <= counter_cell[14].REGOUT
q[15] <= counter_cell[15].REGOUT
cout <= cout_bit.COMBOUT


|top_level|refmachine:I20
AD_BUSY => ix4480.DATAB
AD_SPI_CS <= ix4559_lc.DB_MAX_OUTPUT_PORT_TYPE
AD_SPI_DO => ix4348.DATAA
AD_SPI_DO => ix4490.DATAA
AD_SPI_DO => ix4491.DATAA
AD_SPI_DO => ix4492.DATAA
AD_SPI_DO => ix4493.DATAA
AD_SPI_DO => ix4494.DATAA
AD_SPI_DO => ix4495.DATAA
AD_SPI_DO => ix4496.DATAA
AD_SPI_DO => ix4497.DATAA
AD_SPI_DO => ix4498.DATAA
AD_SPI_DO => ix4499.DATAA
AD_SPI_DO => ix4500.DATAA
AD_SPI_DO => ix4501.DATAA
AD_SPI_DO => ix4502.DATAA
AD_SPI_DO => ix4503.DATAA
AD_SPI_DO => ix4504.DATAA
AD_SPI_DO => ix4505.DATAA
AD_SPI_DO => ix4506.DATAA
AD_SPI_DO => ix4507.DATAA
AD_SPI_DO => ix4508.DATAA
AD_SPI_DO => ix4509.DATAA
AD_SPI_DO => ix4510.DATAA
AD_SPI_DO => ix4511.DATAA
AD_SPI_DO => ix4512.DATAA
AD_SPI_DO => ix4513.DATAA
AD_SPI_DO => ix4514.DATAA
AD_SPI_DO => ix4515.DATAA
AD_SPI_DO => ix4516.DATAA
AD_SPI_DO => ix4517.DATAA
AD_SPI_DO => ix4518.DATAA
AD_SPI_DO => ix4519.DATAA
AD_SPI_DO => ix4520.DATAA
AD_SPI_DO => ix4521.DATAA
AD_SPI_DO => ix4522.DATAA
AD_SPI_DO => ix4523.DATAA
AD_SPI_DO => ix4524.DATAA
AD_SPI_SCLK <= ix4558_lc.DB_MAX_OUTPUT_PORT_TYPE
CLOCK => LPM_COUNTER:COUNT_ix7.clock
CLOCK => reg_AD_BUSY_Tmp.CLK
CLOCK => reg_AD_BUSY_Sync.CLK
CLOCK => reg_REF_START_EXP_Tmp.CLK
CLOCK => reg_REF_START_EXP_Sync.CLK
CLOCK => reg_ACC_CURRENT_STATE_4.CLK
CLOCK => reg_ACC_CURRENT_STATE_3.CLK
CLOCK => reg_ACC_CURRENT_STATE_2.CLK
CLOCK => reg_ACC_CURRENT_STATE_1.CLK
CLOCK => reg_ACC_CURRENT_STATE_0.CLK
DEBUG_MODE => ix4348.DATAB
DEBUG_MODE => ix4472.DATAA
DEBUG_MODE => ix4490.DATAB
DEBUG_MODE => ix4491.DATAB
DEBUG_MODE => ix4492.DATAB
DEBUG_MODE => ix4493.DATAB
DEBUG_MODE => ix4494.DATAB
DEBUG_MODE => ix4495.DATAB
DEBUG_MODE => ix4496.DATAB
DEBUG_MODE => ix4497.DATAB
DEBUG_MODE => ix4498.DATAB
DEBUG_MODE => ix4499.DATAB
DEBUG_MODE => ix4500.DATAB
DEBUG_MODE => ix4501.DATAB
DEBUG_MODE => ix4502.DATAB
DEBUG_MODE => ix4503.DATAB
DEBUG_MODE => ix4504.DATAB
DEBUG_MODE => ix4505.DATAB
DEBUG_MODE => ix4506.DATAB
DEBUG_MODE => ix4507.DATAB
DEBUG_MODE => ix4508.DATAB
DEBUG_MODE => ix4509.DATAB
DEBUG_MODE => ix4510.DATAB
DEBUG_MODE => ix4511.DATAB
DEBUG_MODE => ix4512.DATAB
DEBUG_MODE => ix4513.DATAB
DEBUG_MODE => ix4514.DATAB
DEBUG_MODE => ix4515.DATAB
DEBUG_MODE => ix4516.DATAB
DEBUG_MODE => ix4517.DATAB
DEBUG_MODE => ix4518.DATAB
DEBUG_MODE => ix4519.DATAB
DEBUG_MODE => ix4520.DATAB
DEBUG_MODE => ix4521.DATAB
DEBUG_MODE => ix4522.DATAB
DEBUG_MODE => ix4523.DATAB
DEBUG_MODE => ix4524.DATAB
DSP_SPI_CS => LPM_COUNTER:i_ix8.aclr
DSP_SPI_CS => reg_LAST_EXPOSURE.CLK
DSP_SPI_CS => ix4241.DATAA
DSP_SPI_CS => ix4242.DATAA
DSP_SPI_DI <= reg_DSP_SPI_DI.DB_MAX_OUTPUT_PORT_TYPE
DSP_SPI_SCLK => LPM_COUNTER:i_ix8.clock
DSP_SPI_SCLK => reg_DSP_SPI_DI.CLK
REF_START_EXP => ix4482.DATAB
RESET => ix4232.DATAA
RESET => ix4233.DATAA
RESET => ix4306.DATAA
RESET => ix4307.DATAA
RESET => ix4358.DATAA
RESET => ix4446.DATAA
RESET => ix4447.DATAA
RESET => ix4449.DATAA
RESET => ix4450.DATAA
RESET => ix4451.DATAA
RESET => ix4452.DATAA
RESET => ix4480.DATAA
RESET => ix4481.DATAA
RESET => ix4482.DATAA
RESET => ix4483.DATAA
START_REF_DSP <= reg_REF_START_EXP_Sync.DB_MAX_OUTPUT_PORT_TYPE


|top_level|refmachine:I20|LPM_COUNTER:COUNT_ix7
clock => alt_counter_f10ke:wysi_counter.clock
cnt_en => alt_counter_f10ke:wysi_counter.cnt_en
sclr => alt_counter_f10ke:wysi_counter.sclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
q[2] <= alt_counter_f10ke:wysi_counter.q[2]
q[3] <= alt_counter_f10ke:wysi_counter.q[3]
q[4] <= alt_counter_f10ke:wysi_counter.q[4]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|refmachine:I20|LPM_COUNTER:COUNT_ix7|alt_counter_f10ke:wysi_counter
data[0] => counter_cell[0].DATAC
data[1] => counter_cell[1].DATAC
data[2] => counter_cell[2].DATAC
data[3] => counter_cell[3].DATAC
data[4] => counter_cell[4].DATAC
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
cout <= cout_bit.COMBOUT


|top_level|refmachine:I20|LPM_COUNTER:i_ix8
clock => alt_counter_f10ke:wysi_counter.clock
aclr => alt_counter_f10ke:wysi_counter.aclr
sload => alt_counter_f10ke:wysi_counter.sload
data[0] => alt_counter_f10ke:wysi_counter.data[0]
data[1] => alt_counter_f10ke:wysi_counter.data[1]
data[2] => alt_counter_f10ke:wysi_counter.data[2]
data[3] => alt_counter_f10ke:wysi_counter.data[3]
data[4] => alt_counter_f10ke:wysi_counter.data[4]
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
q[2] <= alt_counter_f10ke:wysi_counter.q[2]
q[3] <= alt_counter_f10ke:wysi_counter.q[3]
q[4] <= alt_counter_f10ke:wysi_counter.q[4]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|refmachine:I20|LPM_COUNTER:i_ix8|alt_counter_f10ke:wysi_counter
data[0] => data_path[0].IN1
data[1] => data_path[1].IN1
data[2] => data_path[2].IN1
data[3] => data_path[3].IN1
data[4] => data_path[4].IN1
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
aclr => counter_cell[4].ACLR
aclr => counter_cell[3].ACLR
aclr => counter_cell[2].ACLR
aclr => counter_cell[1].ACLR
aclr => counter_cell[0].ACLR
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
cout <= cout_bit.COMBOUT


|top_level|MEM_MAP_REG_notri:I3_notri
ADD10_ix5785[6] => ix780.DATAC
ADD10_ix5785[6] => ix794.DATAC
ADD10_ix5785[6] => ix795.DATAA
ADD10_ix5785[6] => ix796.DATAC
ADD10_ix5785[6] => ix797.DATAC
ADD10_ix5785[6] => ix798.DATAC
ADD10_ix5785[6] => ix842.DATAC
ADD10_ix5785[6] => ix843.DATAC
ADD10_ix5785[6] => ix844.DATAC
ADD10_ix5785[6] => ix846.DATAC
ADD10_ix5785[6] => ix848.DATAC
ADD10_ix5785[6] => ix849.DATAC
ADD10_ix5785[6] => ix852.DATAC
ADD10_ix5785[6] => ix853.DATAC
ADD10_ix5785[6] => ix868.DATAC
ADD10_ix5785[6] => ix869.DATAC
BCS5_n <= ix1058_lc.DB_MAX_OUTPUT_PORT_TYPE
CLOCK => ix1068.DATAA
CLOCK => ix1068_repl1.DATAA
DATA[0] => ix874.DATAC
DATA[0] => ix882.DATAC
DATA[0] => ix890.DATAC
DATA[0] => ix898.DATAC
DATA[0] => ix906.DATAC
DATA[0] => ix914.DATAC
DATA[0] => ix922.DATAC
DATA[0] => ix930.DATAC
DATA[0] => ix938.DATAC
DATA[0] => ix946.DATAC
DATA[0] => ix954.DATAC
DATA[0] => ix962.DATAC
DATA[0] => ix970.DATAC
DATA[0] => ix978.DATAC
DATA[0] => ix986.DATAC
DATA[0] => ix994.DATAC
DATA[0] => ix1002.DATAC
DATA[0] => ix1010.DATAC
DATA[0] => ix1018.DATAC
DATA[0] => ix1026.DATAC
DATA[0] => ix1034.DATAC
DATA[0] => ix1042.DATAC
DATA[0] => ix1050.DATAC
DATA[1] => ix875.DATAC
DATA[1] => ix883.DATAC
DATA[1] => ix891.DATAC
DATA[1] => ix899.DATAC
DATA[1] => ix907.DATAC
DATA[1] => ix915.DATAC
DATA[1] => ix923.DATAC
DATA[1] => ix931.DATAC
DATA[1] => ix939.DATAC
DATA[1] => ix947.DATAC
DATA[1] => ix955.DATAC
DATA[1] => ix963.DATAC
DATA[1] => ix971.DATAC
DATA[1] => ix979.DATAC
DATA[1] => ix987.DATAC
DATA[1] => ix995.DATAC
DATA[1] => ix1003.DATAC
DATA[1] => ix1011.DATAC
DATA[1] => ix1019.DATAC
DATA[1] => ix1027.DATAC
DATA[1] => ix1035.DATAC
DATA[1] => ix1043.DATAC
DATA[1] => ix1051.DATAC
DATA[2] => ix876.DATAC
DATA[2] => ix884.DATAC
DATA[2] => ix892.DATAC
DATA[2] => ix900.DATAC
DATA[2] => ix908.DATAC
DATA[2] => ix916.DATAC
DATA[2] => ix924.DATAC
DATA[2] => ix932.DATAC
DATA[2] => ix940.DATAC
DATA[2] => ix948.DATAC
DATA[2] => ix956.DATAC
DATA[2] => ix964.DATAC
DATA[2] => ix972.DATAC
DATA[2] => ix980.DATAC
DATA[2] => ix988.DATAC
DATA[2] => ix996.DATAC
DATA[2] => ix1004.DATAC
DATA[2] => ix1012.DATAC
DATA[2] => ix1020.DATAC
DATA[2] => ix1028.DATAC
DATA[2] => ix1036.DATAC
DATA[2] => ix1044.DATAC
DATA[2] => ix1052.DATAC
DATA[3] => ix877.DATAC
DATA[3] => ix885.DATAC
DATA[3] => ix893.DATAC
DATA[3] => ix901.DATAC
DATA[3] => ix909.DATAC
DATA[3] => ix917.DATAC
DATA[3] => ix925.DATAC
DATA[3] => ix933.DATAC
DATA[3] => ix941.DATAC
DATA[3] => ix949.DATAC
DATA[3] => ix957.DATAC
DATA[3] => ix965.DATAC
DATA[3] => ix973.DATAC
DATA[3] => ix981.DATAC
DATA[3] => ix989.DATAC
DATA[3] => ix997.DATAC
DATA[3] => ix1005.DATAC
DATA[3] => ix1013.DATAC
DATA[3] => ix1021.DATAC
DATA[3] => ix1029.DATAC
DATA[3] => ix1037.DATAC
DATA[3] => ix1045.DATAC
DATA[3] => ix1053.DATAC
DATA[4] => ix878.DATAC
DATA[4] => ix886.DATAC
DATA[4] => ix894.DATAC
DATA[4] => ix902.DATAC
DATA[4] => ix910.DATAC
DATA[4] => ix918.DATAC
DATA[4] => ix926.DATAC
DATA[4] => ix934.DATAC
DATA[4] => ix942.DATAC
DATA[4] => ix950.DATAC
DATA[4] => ix958.DATAC
DATA[4] => ix966.DATAC
DATA[4] => ix974.DATAC
DATA[4] => ix982.DATAC
DATA[4] => ix990.DATAC
DATA[4] => ix998.DATAC
DATA[4] => ix1006.DATAC
DATA[4] => ix1014.DATAC
DATA[4] => ix1022.DATAC
DATA[4] => ix1030.DATAC
DATA[4] => ix1038.DATAC
DATA[4] => ix1046.DATAC
DATA[4] => ix1054.DATAC
DATA[5] => ix879.DATAC
DATA[5] => ix887.DATAC
DATA[5] => ix895.DATAC
DATA[5] => ix903.DATAC
DATA[5] => ix911.DATAC
DATA[5] => ix919.DATAC
DATA[5] => ix927.DATAC
DATA[5] => ix935.DATAC
DATA[5] => ix943.DATAC
DATA[5] => ix951.DATAC
DATA[5] => ix959.DATAC
DATA[5] => ix967.DATAC
DATA[5] => ix975.DATAC
DATA[5] => ix983.DATAC
DATA[5] => ix991.DATAC
DATA[5] => ix999.DATAC
DATA[5] => ix1007.DATAC
DATA[5] => ix1015.DATAC
DATA[5] => ix1023.DATAC
DATA[5] => ix1031.DATAC
DATA[5] => ix1039.DATAC
DATA[5] => ix1047.DATAC
DATA[5] => ix1055.DATAC
DATA[6] => ix880.DATAC
DATA[6] => ix888.DATAC
DATA[6] => ix896.DATAC
DATA[6] => ix904.DATAC
DATA[6] => ix912.DATAC
DATA[6] => ix920.DATAC
DATA[6] => ix928.DATAC
DATA[6] => ix936.DATAC
DATA[6] => ix944.DATAC
DATA[6] => ix952.DATAC
DATA[6] => ix960.DATAC
DATA[6] => ix968.DATAC
DATA[6] => ix976.DATAC
DATA[6] => ix984.DATAC
DATA[6] => ix992.DATAC
DATA[6] => ix1000.DATAC
DATA[6] => ix1008.DATAC
DATA[6] => ix1016.DATAC
DATA[6] => ix1024.DATAC
DATA[6] => ix1032.DATAC
DATA[6] => ix1040.DATAC
DATA[6] => ix1048.DATAC
DATA[6] => ix1056.DATAC
DATA[7] => ix881.DATAC
DATA[7] => ix889.DATAC
DATA[7] => ix897.DATAC
DATA[7] => ix905.DATAC
DATA[7] => ix913.DATAC
DATA[7] => ix921.DATAC
DATA[7] => ix929.DATAC
DATA[7] => ix937.DATAC
DATA[7] => ix945.DATAC
DATA[7] => ix953.DATAC
DATA[7] => ix961.DATAC
DATA[7] => ix969.DATAC
DATA[7] => ix977.DATAC
DATA[7] => ix985.DATAC
DATA[7] => ix993.DATAC
DATA[7] => ix1001.DATAC
DATA[7] => ix1009.DATAC
DATA[7] => ix1017.DATAC
DATA[7] => ix1025.DATAC
DATA[7] => ix1033.DATAC
DATA[7] => ix1041.DATAC
DATA[7] => ix1049.DATAC
DATA[7] => ix1057.DATAC
NOT_nx146 <= ix1059_lc.DB_MAX_OUTPUT_PORT_TYPE
nx110 <= ix1061_lc.DB_MAX_OUTPUT_PORT_TYPE
nx121 <= ix1060_lc.DB_MAX_OUTPUT_PORT_TYPE
nx44 <= ix1067_lc.DB_MAX_OUTPUT_PORT_TYPE
nx55 <= ix1066_lc.DB_MAX_OUTPUT_PORT_TYPE
nx66 <= ix1065_lc.DB_MAX_OUTPUT_PORT_TYPE
nx77 <= ix1064_lc.DB_MAX_OUTPUT_PORT_TYPE
nx88 <= ix1063_lc.DB_MAX_OUTPUT_PORT_TYPE
nx99 <= ix1062_lc.DB_MAX_OUTPUT_PORT_TYPE
PRFRLAD[0] => ix780.DATAB
PRFRLAD[0] => ix793.DATAB
PRFRLAD[0] => ix794.DATAB
PRFRLAD[0] => ix796.DATAB
PRFRLAD[0] => ix797.DATAB
PRFRLAD[0] => ix798.DATAB
PRFRLAD[0] => ix842.DATAB
PRFRLAD[0] => ix843.DATAB
PRFRLAD[0] => ix844.DATAB
PRFRLAD[0] => ix846.DATAB
PRFRLAD[0] => ix848.DATAB
PRFRLAD[0] => ix849.DATAB
PRFRLAD[0] => ix852.DATAB
PRFRLAD[0] => ix853.DATAB
PRFRLAD[0] => ix868.DATAB
PRFRLAD[0] => ix869.DATAB
PRFRLAD[1] => ix780.DATAA
PRFRLAD[1] => ix793.DATAA
PRFRLAD[1] => ix794.DATAA
PRFRLAD[1] => ix796.DATAA
PRFRLAD[1] => ix797.DATAA
PRFRLAD[1] => ix798.DATAA
PRFRLAD[1] => ix842.DATAA
PRFRLAD[1] => ix843.DATAA
PRFRLAD[1] => ix844.DATAA
PRFRLAD[1] => ix846.DATAA
PRFRLAD[1] => ix848.DATAA
PRFRLAD[1] => ix849.DATAA
PRFRLAD[1] => ix852.DATAA
PRFRLAD[1] => ix853.DATAA
PRFRLAD[1] => ix868.DATAA
PRFRLAD[1] => ix869.DATAA
PRFRLAD[2] => ix782.DATAB
PRFRLAD[2] => ix784.DATAB
PRFRLAD[2] => ix786.DATAB
PRFRLAD[2] => ix790.DATAD
PRFRLAD[2] => ix792.DATAB
PRFRLAD[2] => ix845.DATAD
PRFRLAD[2] => ix847.DATAD
PRFRLAD[2] => ix851.DATAD
PRFRLAD[3] => ix782.DATAA
PRFRLAD[3] => ix784.DATAA
PRFRLAD[3] => ix786.DATAA
PRFRLAD[3] => ix790.DATAC
PRFRLAD[3] => ix792.DATAA
PRFRLAD[3] => ix845.DATAC
PRFRLAD[3] => ix847.DATAC
PRFRLAD[3] => ix851.DATAC
PRFRLAD[4] => ix787.DATAB
PRFRLAD[4] => ix788.DATAB
PRFRLAD[4] => ix789.DATAB
PRFRLAD[4] => ix790.DATAB
PRFRLAD[4] => ix791.DATAB
PRFRLAD[4] => ix845.DATAB
PRFRLAD[4] => ix847.DATAB
PRFRLAD[4] => ix851.DATAB
PRFRLAD[4] => ix862.DATAB
PRFRLAD[4] => ix863.DATAB
PRFRLAD[4] => ix865.DATAB
PRFRLAD[4] => ix866.DATAB
PRFRLAD[4] => ix867.DATAB
PRFRLAD[5] => ix787.DATAA
PRFRLAD[5] => ix788.DATAA
PRFRLAD[5] => ix789.DATAA
PRFRLAD[5] => ix790.DATAA
PRFRLAD[5] => ix791.DATAA
PRFRLAD[5] => ix845.DATAA
PRFRLAD[5] => ix847.DATAA
PRFRLAD[5] => ix851.DATAA
PRFRLAD[5] => ix862.DATAA
PRFRLAD[5] => ix863.DATAA
PRFRLAD[5] => ix865.DATAA
PRFRLAD[5] => ix866.DATAA
PRFRLAD[5] => ix867.DATAA
R_REG_00008[0] => ix830.DATAB
R_REG_00008[1] => ix826.DATAB
R_REG_00008[2] => ix822.DATAB
R_REG_00008[3] => ix818.DATAB
R_REG_00008[4] => ix814.DATAB
R_REG_00008[5] => ix810.DATAB
R_REG_00008[6] => ix806.DATAB
R_REG_00008[7] => ix802.DATAB
R_REG_00009[0] => ix830.DATAA
R_REG_00009[1] => ix826.DATAA
R_REG_00009[2] => ix822.DATAA
R_REG_00009[3] => ix818.DATAA
R_REG_00009[4] => ix814.DATAA
R_REG_00009[5] => ix810.DATAA
R_REG_00009[6] => ix806.DATAA
R_REG_00009[7] => ix802.DATAA
R_REG_0002A[0] => ix829.DATAA
R_REG_0002A[1] => ix825.DATAA
R_REG_0002A[2] => ix821.DATAA
R_REG_0002A[3] => ix817.DATAA
R_REG_0002A[4] => ix813.DATAA
R_REG_0002A[5] => ix809.DATAA
R_REG_0002A[6] => ix805.DATAA
R_REG_0002A[7] => ix801.DATAA
R_REG_0002B[0] => ix828.DATAB
R_REG_0002B[1] => ix824.DATAB
R_REG_0002B[2] => ix820.DATAB
R_REG_0002B[3] => ix816.DATAB
R_REG_0002B[4] => ix812.DATAB
R_REG_0002B[5] => ix808.DATAB
R_REG_0002B[6] => ix804.DATAB
R_REG_0002B[7] => ix800.DATAB
R_REG_0002C[0] => ix828.DATAA
R_REG_0002C[1] => ix824.DATAA
R_REG_0002C[2] => ix820.DATAA
R_REG_0002C[3] => ix816.DATAA
R_REG_0002C[4] => ix812.DATAA
R_REG_0002C[5] => ix808.DATAA
R_REG_0002C[6] => ix804.DATAA
R_REG_0002C[7] => ix800.DATAA
R_REG_0002E[0] => ix827.DATAB
R_REG_0002E[1] => ix823.DATAB
R_REG_0002E[2] => ix819.DATAB
R_REG_0002E[3] => ix815.DATAB
R_REG_0002E[4] => ix811.DATAB
R_REG_0002E[5] => ix807.DATAB
R_REG_0002E[6] => ix803.DATAB
R_REG_0002E[7] => ix799.DATAB
R_REG_0002F[0] => ix827.DATAA
R_REG_0002F[1] => ix823.DATAA
R_REG_0002F[2] => ix819.DATAA
R_REG_0002F[3] => ix815.DATAA
R_REG_0002F[4] => ix811.DATAA
R_REG_0002F[5] => ix807.DATAA
R_REG_0002F[6] => ix803.DATAA
R_REG_0002F[7] => ix799.DATAA
R_REG_00030[0] => ix861.DATAA
R_REG_00030[1] => ix860.DATAA
R_REG_00030[2] => ix859.DATAA
R_REG_00030[3] => ix858.DATAA
R_REG_00030[4] => ix857.DATAA
R_REG_00030[5] => ix856.DATAA
R_REG_00030[6] => ix855.DATAA
R_REG_00030[7] => ix854.DATAA
R_STRB => ix795.DATAB
R_STRB => ix842.DATAD
RESET => ix751.DATAA
RESET => ix752.DATAA
RESET => ix753.DATAA
RESET => ix754.DATAA
RESET => ix755.DATAA
RESET => ix756.DATAA
RESET => ix757.DATAA
RESET => ix758.DATAA
RESET => ix759.DATAA
RESET => ix760.DATAA
RESET => ix761.DATAA
RESET => ix762.DATAA
RESET => ix763.DATAA
RESET => ix764.DATAA
RESET => ix765.DATAB
RESET => ix766.DATAA
RESET => ix767.DATAA
RESET => ix768.DATAA
RESET => ix769.DATAA
RESET => ix770.DATAA
RESET => ix771.DATAA
RESET => ix772.DATAA
RESET => ix773.DATAA
RESET => ix862.DATAC
RESET => ix863.DATAC
RESET => ix864.DATAB
RESET => ix865.DATAC
RESET => ix874.DATAA
RESET => ix875.DATAA
RESET => ix876.DATAA
RESET => ix877.DATAA
RESET => ix878.DATAA
RESET => ix879.DATAA
RESET => ix880.DATAA
RESET => ix881.DATAA
RESET => ix882.DATAA
RESET => ix883.DATAA
RESET => ix884.DATAA
RESET => ix885.DATAA
RESET => ix886.DATAA
RESET => ix887.DATAA
RESET => ix888.DATAA
RESET => ix889.DATAA
RESET => ix890.DATAA
RESET => ix891.DATAA
RESET => ix892.DATAA
RESET => ix893.DATAA
RESET => ix894.DATAA
RESET => ix895.DATAA
RESET => ix896.DATAA
RESET => ix897.DATAA
RESET => ix898.DATAA
RESET => ix899.DATAA
RESET => ix900.DATAA
RESET => ix901.DATAA
RESET => ix902.DATAA
RESET => ix903.DATAA
RESET => ix904.DATAA
RESET => ix905.DATAA
RESET => ix906.DATAA
RESET => ix907.DATAA
RESET => ix908.DATAA
RESET => ix909.DATAA
RESET => ix910.DATAA
RESET => ix911.DATAA
RESET => ix912.DATAA
RESET => ix913.DATAA
RESET => ix914.DATAA
RESET => ix915.DATAA
RESET => ix916.DATAA
RESET => ix917.DATAA
RESET => ix918.DATAA
RESET => ix919.DATAA
RESET => ix920.DATAA
RESET => ix921.DATAA
RESET => ix922.DATAA
RESET => ix923.DATAA
RESET => ix924.DATAA
RESET => ix925.DATAA
RESET => ix926.DATAA
RESET => ix927.DATAA
RESET => ix928.DATAA
RESET => ix929.DATAA
RESET => ix930.DATAA
RESET => ix931.DATAA
RESET => ix932.DATAA
RESET => ix933.DATAA
RESET => ix934.DATAA
RESET => ix935.DATAA
RESET => ix936.DATAA
RESET => ix937.DATAA
RESET => ix938.DATAA
RESET => ix939.DATAA
RESET => ix940.DATAA
RESET => ix941.DATAA
RESET => ix942.DATAA
RESET => ix943.DATAA
RESET => ix944.DATAA
RESET => ix945.DATAA
RESET => ix946.DATAA
RESET => ix947.DATAA
RESET => ix948.DATAA
RESET => ix949.DATAA
RESET => ix950.DATAA
RESET => ix951.DATAA
RESET => ix952.DATAA
RESET => ix953.DATAA
RESET => ix954.DATAA
RESET => ix955.DATAA
RESET => ix956.DATAA
RESET => ix957.DATAA
RESET => ix958.DATAA
RESET => ix959.DATAA
RESET => ix960.DATAA
RESET => ix961.DATAA
RESET => ix962.DATAA
RESET => ix963.DATAA
RESET => ix964.DATAA
RESET => ix965.DATAA
RESET => ix966.DATAA
RESET => ix967.DATAA
RESET => ix968.DATAA
RESET => ix969.DATAA
RESET => ix970.DATAA
RESET => ix971.DATAA
RESET => ix972.DATAA
RESET => ix973.DATAA
RESET => ix974.DATAA
RESET => ix975.DATAA
RESET => ix976.DATAA
RESET => ix977.DATAA
RESET => ix978.DATAA
RESET => ix979.DATAA
RESET => ix980.DATAA
RESET => ix981.DATAA
RESET => ix982.DATAA
RESET => ix983.DATAA
RESET => ix984.DATAA
RESET => ix985.DATAA
RESET => ix986.DATAA
RESET => ix987.DATAA
RESET => ix988.DATAA
RESET => ix989.DATAA
RESET => ix990.DATAA
RESET => ix991.DATAA
RESET => ix992.DATAA
RESET => ix993.DATAA
RESET => ix994.DATAA
RESET => ix995.DATAA
RESET => ix996.DATAA
RESET => ix997.DATAA
RESET => ix998.DATAA
RESET => ix999.DATAA
RESET => ix1000.DATAA
RESET => ix1001.DATAA
RESET => ix1002.DATAA
RESET => ix1003.DATAA
RESET => ix1004.DATAA
RESET => ix1005.DATAA
RESET => ix1006.DATAA
RESET => ix1007.DATAA
RESET => ix1008.DATAA
RESET => ix1009.DATAA
RESET => ix1010.DATAA
RESET => ix1011.DATAA
RESET => ix1012.DATAA
RESET => ix1013.DATAA
RESET => ix1014.DATAA
RESET => ix1015.DATAA
RESET => ix1016.DATAA
RESET => ix1017.DATAA
RESET => ix1018.DATAA
RESET => ix1019.DATAA
RESET => ix1020.DATAA
RESET => ix1021.DATAA
RESET => ix1022.DATAA
RESET => ix1023.DATAA
RESET => ix1024.DATAA
RESET => ix1025.DATAA
RESET => ix1026.DATAA
RESET => ix1027.DATAA
RESET => ix1028.DATAA
RESET => ix1029.DATAA
RESET => ix1030.DATAA
RESET => ix1031.DATAA
RESET => ix1032.DATAA
RESET => ix1033.DATAA
RESET => ix1034.DATAA
RESET => ix1035.DATAA
RESET => ix1036.DATAA
RESET => ix1037.DATAA
RESET => ix1038.DATAA
RESET => ix1039.DATAA
RESET => ix1040.DATAA
RESET => ix1041.DATAA
RESET => ix1042.DATAA
RESET => ix1043.DATAA
RESET => ix1044.DATAA
RESET => ix1045.DATAA
RESET => ix1046.DATAA
RESET => ix1047.DATAA
RESET => ix1048.DATAA
RESET => ix1049.DATAA
RESET => ix1050.DATAA
RESET => ix1051.DATAA
RESET => ix1052.DATAA
RESET => ix1053.DATAA
RESET => ix1054.DATAA
RESET => ix1055.DATAA
RESET => ix1056.DATAA
RESET => ix1057.DATAA
STRB_W_00002 <= reg_STRB_W_00002.DB_MAX_OUTPUT_PORT_TYPE
STRB_W_00004 <= reg_STRB_W_00004.DB_MAX_OUTPUT_PORT_TYPE
STRB_W_0001A <= reg_STRB_W_0001A.DB_MAX_OUTPUT_PORT_TYPE
STRB_W_0001B <= reg_STRB_W_0001B.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[0] <= reg_W_REG_00005_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[1] <= reg_W_REG_00005_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[2] <= reg_W_REG_00005_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[3] <= reg_W_REG_00005_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[4] <= reg_W_REG_00005_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[5] <= reg_W_REG_00005_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[6] <= reg_W_REG_00005_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00005[7] <= reg_W_REG_00005_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[0] <= reg_W_REG_00006_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[1] <= reg_W_REG_00006_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[2] <= reg_W_REG_00006_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[3] <= reg_W_REG_00006_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[4] <= reg_W_REG_00006_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[5] <= reg_W_REG_00006_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[6] <= reg_W_REG_00006_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00006[7] <= reg_W_REG_00006_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[0] <= reg_W_REG_00007_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[1] <= reg_W_REG_00007_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[2] <= reg_W_REG_00007_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[3] <= reg_W_REG_00007_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[4] <= reg_W_REG_00007_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[5] <= reg_W_REG_00007_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[6] <= reg_W_REG_00007_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00007[7] <= reg_W_REG_00007_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[0] <= reg_W_REG_00010_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[1] <= reg_W_REG_00010_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[2] <= reg_W_REG_00010_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[3] <= reg_W_REG_00010_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[4] <= reg_W_REG_00010_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[5] <= reg_W_REG_00010_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[6] <= reg_W_REG_00010_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00010[7] <= reg_W_REG_00010_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[0] <= reg_W_REG_00011_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[1] <= reg_W_REG_00011_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[2] <= reg_W_REG_00011_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[3] <= reg_W_REG_00011_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[4] <= reg_W_REG_00011_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[5] <= reg_W_REG_00011_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[6] <= reg_W_REG_00011_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00011[7] <= reg_W_REG_00011_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[0] <= reg_W_REG_00012_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[1] <= reg_W_REG_00012_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[2] <= reg_W_REG_00012_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[3] <= reg_W_REG_00012_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[4] <= reg_W_REG_00012_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[5] <= reg_W_REG_00012_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[6] <= reg_W_REG_00012_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00012[7] <= reg_W_REG_00012_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[0] <= reg_W_REG_00015_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[1] <= reg_W_REG_00015_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[2] <= reg_W_REG_00015_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[3] <= reg_W_REG_00015_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[4] <= reg_W_REG_00015_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[5] <= reg_W_REG_00015_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[6] <= reg_W_REG_00015_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00015[7] <= reg_W_REG_00015_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[0] <= reg_W_REG_00019_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[1] <= reg_W_REG_00019_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[2] <= reg_W_REG_00019_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[3] <= reg_W_REG_00019_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[4] <= reg_W_REG_00019_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[5] <= reg_W_REG_00019_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[6] <= reg_W_REG_00019_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00019[7] <= reg_W_REG_00019_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[0] <= reg_W_REG_0001C_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[1] <= reg_W_REG_0001C_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[2] <= reg_W_REG_0001C_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[3] <= reg_W_REG_0001C_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[4] <= reg_W_REG_0001C_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[5] <= reg_W_REG_0001C_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[6] <= reg_W_REG_0001C_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001C[7] <= reg_W_REG_0001C_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[0] <= reg_W_REG_0001D_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[1] <= reg_W_REG_0001D_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[2] <= reg_W_REG_0001D_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[3] <= reg_W_REG_0001D_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[4] <= reg_W_REG_0001D_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[5] <= reg_W_REG_0001D_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[6] <= reg_W_REG_0001D_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001D[7] <= reg_W_REG_0001D_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[0] <= reg_W_REG_0001E_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[1] <= reg_W_REG_0001E_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[2] <= reg_W_REG_0001E_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[3] <= reg_W_REG_0001E_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[4] <= reg_W_REG_0001E_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[5] <= reg_W_REG_0001E_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[6] <= reg_W_REG_0001E_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001E[7] <= reg_W_REG_0001E_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[0] <= reg_W_REG_0001F_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[1] <= reg_W_REG_0001F_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[2] <= reg_W_REG_0001F_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[3] <= reg_W_REG_0001F_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[4] <= reg_W_REG_0001F_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[5] <= reg_W_REG_0001F_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[6] <= reg_W_REG_0001F_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0001F[7] <= reg_W_REG_0001F_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[0] <= reg_W_REG_00020_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[1] <= reg_W_REG_00020_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[2] <= reg_W_REG_00020_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[3] <= reg_W_REG_00020_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[4] <= reg_W_REG_00020_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[5] <= reg_W_REG_00020_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[6] <= reg_W_REG_00020_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00020[7] <= reg_W_REG_00020_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[0] <= reg_W_REG_00021_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[1] <= reg_W_REG_00021_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[2] <= reg_W_REG_00021_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[3] <= reg_W_REG_00021_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[4] <= reg_W_REG_00021_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[5] <= reg_W_REG_00021_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[6] <= reg_W_REG_00021_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00021[7] <= reg_W_REG_00021_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[0] <= reg_W_REG_00022_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[1] <= reg_W_REG_00022_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[2] <= reg_W_REG_00022_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[3] <= reg_W_REG_00022_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[4] <= reg_W_REG_00022_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[5] <= reg_W_REG_00022_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[6] <= reg_W_REG_00022_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00022[7] <= reg_W_REG_00022_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[0] <= reg_W_REG_00023_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[1] <= reg_W_REG_00023_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[2] <= reg_W_REG_00023_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[3] <= reg_W_REG_00023_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[4] <= reg_W_REG_00023_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[5] <= reg_W_REG_00023_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[6] <= reg_W_REG_00023_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00023[7] <= reg_W_REG_00023_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[0] <= reg_W_REG_00024_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[1] <= reg_W_REG_00024_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[2] <= reg_W_REG_00024_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[3] <= reg_W_REG_00024_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[4] <= reg_W_REG_00024_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[5] <= reg_W_REG_00024_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[6] <= reg_W_REG_00024_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00024[7] <= reg_W_REG_00024_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[0] <= reg_W_REG_00025_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[1] <= reg_W_REG_00025_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[2] <= reg_W_REG_00025_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[3] <= reg_W_REG_00025_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[4] <= reg_W_REG_00025_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[5] <= reg_W_REG_00025_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[6] <= reg_W_REG_00025_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_00025[7] <= reg_W_REG_00025_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[0] <= reg_W_REG_0003A_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[1] <= reg_W_REG_0003A_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[2] <= reg_W_REG_0003A_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[3] <= reg_W_REG_0003A_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[4] <= reg_W_REG_0003A_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[5] <= reg_W_REG_0003A_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[6] <= reg_W_REG_0003A_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003A[7] <= reg_W_REG_0003A_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[0] <= reg_W_REG_0003B_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[1] <= reg_W_REG_0003B_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[2] <= reg_W_REG_0003B_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[3] <= reg_W_REG_0003B_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[4] <= reg_W_REG_0003B_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[5] <= reg_W_REG_0003B_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[6] <= reg_W_REG_0003B_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003B[7] <= reg_W_REG_0003B_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[0] <= reg_W_REG_0003C_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[1] <= reg_W_REG_0003C_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[2] <= reg_W_REG_0003C_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[3] <= reg_W_REG_0003C_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[4] <= reg_W_REG_0003C_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[5] <= reg_W_REG_0003C_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[6] <= reg_W_REG_0003C_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003C[7] <= reg_W_REG_0003C_0.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[0] <= reg_W_REG_0003D_7.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[1] <= reg_W_REG_0003D_6.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[2] <= reg_W_REG_0003D_5.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[3] <= reg_W_REG_0003D_4.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[4] <= reg_W_REG_0003D_3.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[5] <= reg_W_REG_0003D_2.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[6] <= reg_W_REG_0003D_1.DB_MAX_OUTPUT_PORT_TYPE
W_REG_0003D[7] <= reg_W_REG_0003D_0.DB_MAX_OUTPUT_PORT_TYPE
W_STRB => ix765.DATAA
W_STRB => ix794.DATAD
W_STRB => ix796.DATAD
W_STRB => ix797.DATAD
W_STRB => ix798.DATAD
W_STRB => ix864.DATAA


|top_level|SPI_CNTRL:I4
CLOCK => LPM_COUNTER:COUNT_ix8.clock
CLOCK => LPM_COUNTER:MUX_CHAN_CNT_ix8.clock
CLOCK => reg_DRDY_SYNC2.CLK
CLOCK => reg_CURRENT_STATE_4.CLK
CLOCK => reg_CURRENT_STATE_3.CLK
CLOCK => reg_CURRENT_STATE_2.CLK
CLOCK => reg_CURRENT_STATE_1.CLK
CLOCK => reg_CURRENT_STATE_0.CLK
CS_n <= ix3290_lc.DB_MAX_OUTPUT_PORT_TYPE
DATA2AD <= ix3291_lc.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[0] <= lat_DATA_CH0_0.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[1] <= lat_DATA_CH0_1.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[2] <= lat_DATA_CH0_2.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[3] <= lat_DATA_CH0_3.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[4] <= lat_DATA_CH0_4.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[5] <= lat_DATA_CH0_5.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[6] <= lat_DATA_CH0_6.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[7] <= lat_DATA_CH0_7.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[8] <= lat_DATA_CH0_8.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[9] <= lat_DATA_CH0_9.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[10] <= lat_DATA_CH0_10.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[11] <= lat_DATA_CH0_11.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[12] <= lat_DATA_CH0_12.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[13] <= lat_DATA_CH0_13.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[14] <= lat_DATA_CH0_14.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[15] <= lat_DATA_CH0_15.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[16] <= lat_DATA_CH0_16.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[17] <= lat_DATA_CH0_17.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[18] <= lat_DATA_CH0_18.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[19] <= lat_DATA_CH0_19.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[20] <= lat_DATA_CH0_20.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[21] <= lat_DATA_CH0_21.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[22] <= lat_DATA_CH0_22.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH0[23] <= lat_DATA_CH0_23.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[0] <= lat_DATA_CH1_0.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[1] <= lat_DATA_CH1_1.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[2] <= lat_DATA_CH1_2.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[3] <= lat_DATA_CH1_3.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[4] <= lat_DATA_CH1_4.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[5] <= lat_DATA_CH1_5.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[6] <= lat_DATA_CH1_6.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[7] <= lat_DATA_CH1_7.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[8] <= lat_DATA_CH1_8.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[9] <= lat_DATA_CH1_9.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[10] <= lat_DATA_CH1_10.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[11] <= lat_DATA_CH1_11.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[12] <= lat_DATA_CH1_12.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[13] <= lat_DATA_CH1_13.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[14] <= lat_DATA_CH1_14.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[15] <= lat_DATA_CH1_15.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[16] <= lat_DATA_CH1_16.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[17] <= lat_DATA_CH1_17.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[18] <= lat_DATA_CH1_18.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[19] <= lat_DATA_CH1_19.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[20] <= lat_DATA_CH1_20.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[21] <= lat_DATA_CH1_21.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[22] <= lat_DATA_CH1_22.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH1[23] <= lat_DATA_CH1_23.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[0] <= lat_DATA_CH2_0.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[1] <= lat_DATA_CH2_1.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[2] <= lat_DATA_CH2_2.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[3] <= lat_DATA_CH2_3.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[4] <= lat_DATA_CH2_4.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[5] <= lat_DATA_CH2_5.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[6] <= lat_DATA_CH2_6.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[7] <= lat_DATA_CH2_7.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[8] <= lat_DATA_CH2_8.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[9] <= lat_DATA_CH2_9.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[10] <= lat_DATA_CH2_10.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[11] <= lat_DATA_CH2_11.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[12] <= lat_DATA_CH2_12.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[13] <= lat_DATA_CH2_13.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[14] <= lat_DATA_CH2_14.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[15] <= lat_DATA_CH2_15.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[16] <= lat_DATA_CH2_16.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[17] <= lat_DATA_CH2_17.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[18] <= lat_DATA_CH2_18.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[19] <= lat_DATA_CH2_19.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[20] <= lat_DATA_CH2_20.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[21] <= lat_DATA_CH2_21.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[22] <= lat_DATA_CH2_22.DB_MAX_OUTPUT_PORT_TYPE
DATA_CH2[23] <= lat_DATA_CH2_23.DB_MAX_OUTPUT_PORT_TYPE
DATA_FROM_AD => lat_DATA_CH0_23.DATAIN
DATA_FROM_AD => lat_DATA_CH0_22.DATAIN
DATA_FROM_AD => lat_DATA_CH0_21.DATAIN
DATA_FROM_AD => lat_DATA_CH0_20.DATAIN
DATA_FROM_AD => lat_DATA_CH0_19.DATAIN
DATA_FROM_AD => lat_DATA_CH0_18.DATAIN
DATA_FROM_AD => lat_DATA_CH0_17.DATAIN
DATA_FROM_AD => lat_DATA_CH0_16.DATAIN
DATA_FROM_AD => lat_DATA_CH0_15.DATAIN
DATA_FROM_AD => lat_DATA_CH0_14.DATAIN
DATA_FROM_AD => lat_DATA_CH0_13.DATAIN
DATA_FROM_AD => lat_DATA_CH0_12.DATAIN
DATA_FROM_AD => lat_DATA_CH0_11.DATAIN
DATA_FROM_AD => lat_DATA_CH0_10.DATAIN
DATA_FROM_AD => lat_DATA_CH0_9.DATAIN
DATA_FROM_AD => lat_DATA_CH0_8.DATAIN
DATA_FROM_AD => lat_DATA_CH0_7.DATAIN
DATA_FROM_AD => lat_DATA_CH0_6.DATAIN
DATA_FROM_AD => lat_DATA_CH0_5.DATAIN
DATA_FROM_AD => lat_DATA_CH0_4.DATAIN
DATA_FROM_AD => lat_DATA_CH0_3.DATAIN
DATA_FROM_AD => lat_DATA_CH0_2.DATAIN
DATA_FROM_AD => lat_DATA_CH0_1.DATAIN
DATA_FROM_AD => lat_DATA_CH0_0.DATAIN
DATA_FROM_AD => lat_DATA_CH1_23.DATAIN
DATA_FROM_AD => lat_DATA_CH1_22.DATAIN
DATA_FROM_AD => lat_DATA_CH1_21.DATAIN
DATA_FROM_AD => lat_DATA_CH1_20.DATAIN
DATA_FROM_AD => lat_DATA_CH1_19.DATAIN
DATA_FROM_AD => lat_DATA_CH1_18.DATAIN
DATA_FROM_AD => lat_DATA_CH1_17.DATAIN
DATA_FROM_AD => lat_DATA_CH1_16.DATAIN
DATA_FROM_AD => lat_DATA_CH1_15.DATAIN
DATA_FROM_AD => lat_DATA_CH1_14.DATAIN
DATA_FROM_AD => lat_DATA_CH1_13.DATAIN
DATA_FROM_AD => lat_DATA_CH1_12.DATAIN
DATA_FROM_AD => lat_DATA_CH1_11.DATAIN
DATA_FROM_AD => lat_DATA_CH1_10.DATAIN
DATA_FROM_AD => lat_DATA_CH1_9.DATAIN
DATA_FROM_AD => lat_DATA_CH1_8.DATAIN
DATA_FROM_AD => lat_DATA_CH1_7.DATAIN
DATA_FROM_AD => lat_DATA_CH1_6.DATAIN
DATA_FROM_AD => lat_DATA_CH1_5.DATAIN
DATA_FROM_AD => lat_DATA_CH1_4.DATAIN
DATA_FROM_AD => lat_DATA_CH1_3.DATAIN
DATA_FROM_AD => lat_DATA_CH1_2.DATAIN
DATA_FROM_AD => lat_DATA_CH1_1.DATAIN
DATA_FROM_AD => lat_DATA_CH1_0.DATAIN
DATA_FROM_AD => lat_DATA_CH2_23.DATAIN
DATA_FROM_AD => lat_DATA_CH2_22.DATAIN
DATA_FROM_AD => lat_DATA_CH2_21.DATAIN
DATA_FROM_AD => lat_DATA_CH2_20.DATAIN
DATA_FROM_AD => lat_DATA_CH2_19.DATAIN
DATA_FROM_AD => lat_DATA_CH2_18.DATAIN
DATA_FROM_AD => lat_DATA_CH2_17.DATAIN
DATA_FROM_AD => lat_DATA_CH2_16.DATAIN
DATA_FROM_AD => lat_DATA_CH2_15.DATAIN
DATA_FROM_AD => lat_DATA_CH2_14.DATAIN
DATA_FROM_AD => lat_DATA_CH2_13.DATAIN
DATA_FROM_AD => lat_DATA_CH2_12.DATAIN
DATA_FROM_AD => lat_DATA_CH2_11.DATAIN
DATA_FROM_AD => lat_DATA_CH2_10.DATAIN
DATA_FROM_AD => lat_DATA_CH2_9.DATAIN
DATA_FROM_AD => lat_DATA_CH2_8.DATAIN
DATA_FROM_AD => lat_DATA_CH2_7.DATAIN
DATA_FROM_AD => lat_DATA_CH2_6.DATAIN
DATA_FROM_AD => lat_DATA_CH2_5.DATAIN
DATA_FROM_AD => lat_DATA_CH2_4.DATAIN
DATA_FROM_AD => lat_DATA_CH2_3.DATAIN
DATA_FROM_AD => lat_DATA_CH2_2.DATAIN
DATA_FROM_AD => lat_DATA_CH2_1.DATAIN
DATA_FROM_AD => lat_DATA_CH2_0.DATAIN
DATA_RDY => ix3282.DATAA
DATA_RDY_SYNC <= ix3292_lc.DB_MAX_OUTPUT_PORT_TYPE
RESET => LPM_COUNTER:COUNT_ix8.aclr
RESET => LPM_COUNTER:MUX_CHAN_CNT_ix8.aclr
RESET => ix3180.DATAA
RESET => ix3283.DATAA
SCLK <= ix3289_lc.DB_MAX_OUTPUT_PORT_TYPE
SYSCLOCK => reg_DRDY1.CLK
SYSCLOCK => reg_DRDY_SYNC.CLK


|top_level|SPI_CNTRL:I4|LPM_COUNTER:COUNT_ix8
clock => alt_counter_f10ke:wysi_counter.clock
cnt_en => alt_counter_f10ke:wysi_counter.cnt_en
aclr => alt_counter_f10ke:wysi_counter.aclr
sclr => alt_counter_f10ke:wysi_counter.sclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
q[2] <= alt_counter_f10ke:wysi_counter.q[2]
q[3] <= alt_counter_f10ke:wysi_counter.q[3]
q[4] <= alt_counter_f10ke:wysi_counter.q[4]
q[5] <= alt_counter_f10ke:wysi_counter.q[5]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|SPI_CNTRL:I4|LPM_COUNTER:COUNT_ix8|alt_counter_f10ke:wysi_counter
data[0] => counter_cell[0].DATAC
data[1] => counter_cell[1].DATAC
data[2] => counter_cell[2].DATAC
data[3] => counter_cell[3].DATAC
data[4] => counter_cell[4].DATAC
data[5] => counter_cell[5].DATAC
clock => counter_cell[5].CLK
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
aclr => counter_cell[5].ACLR
aclr => counter_cell[4].ACLR
aclr => counter_cell[3].ACLR
aclr => counter_cell[2].ACLR
aclr => counter_cell[1].ACLR
aclr => counter_cell[0].ACLR
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
q[5] <= counter_cell[5].REGOUT
cout <= cout_bit.COMBOUT


|top_level|SPI_CNTRL:I4|LPM_COUNTER:MUX_CHAN_CNT_ix8
clock => alt_counter_f10ke:wysi_counter.clock
cnt_en => alt_counter_f10ke:wysi_counter.cnt_en
aclr => alt_counter_f10ke:wysi_counter.aclr
sclr => alt_counter_f10ke:wysi_counter.sclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|SPI_CNTRL:I4|LPM_COUNTER:MUX_CHAN_CNT_ix8|alt_counter_f10ke:wysi_counter
data[0] => counter_cell[0].DATAC
data[1] => counter_cell[1].DATAC
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
aclr => counter_cell[1].ACLR
aclr => counter_cell[0].ACLR
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
cout <= cout_bit.COMBOUT


|top_level|FILTER_WHEEL_3977:I40
CLOCK => reg_TPUINPUTS_SYNC1_3.CLK
CLOCK => reg_TPUINPUTS_SYNC1_2.CLK
CLOCK => reg_TPUINPUTS_SYNC1_1.CLK
CLOCK => reg_TPUINPUTS_SYNC1_0.CLK
CLOCK => reg_TPUINPUTS_SYNC2_3.CLK
CLOCK => reg_TPUINPUTS_SYNC2_2.CLK
CLOCK => reg_TPUINPUTS_SYNC2_1.CLK
CLOCK => reg_TPUINPUTS_SYNC2_0.CLK
CLOCK => reg_TPUINPUTS_SYNC3_3.CLK
CLOCK => reg_TPUINPUTS_SYNC3_2.CLK
CLOCK => reg_TPUINPUTS_SYNC3_1.CLK
CLOCK => reg_TPUINPUTS_SYNC3_0.CLK
CLOCK => reg_COUNT_6.CLK
CLOCK => reg_COUNT_5.CLK
CLOCK => reg_COUNT_4.CLK
CLOCK => reg_COUNT_3.CLK
CLOCK => reg_COUNT_2.CLK
CLOCK => reg_COUNT_1.CLK
CLOCK => reg_COUNT_0.CLK
CLOCK => reg_FLTR_WHL_STEP.CLK
CLOCK => reg_CURRENT_STATE_3.CLK
CLOCK => reg_CURRENT_STATE_2.CLK
CLOCK => reg_CURRENT_STATE_1.CLK
CLOCK => reg_CURRENT_STATE_0.CLK
FILTER_EN_n => ix1270.DATAB
FILTER_EN_n => ix1273.DATAB
FILTER_EN_n => ix1303.DATAB
FILTER_HOLD_n => ix1270.DATAA
FILTER_HOLD_n => ix1273.DATAA
FILTER_HOLD_n => ix1303.DATAA
FILTER_HOLD_n => ix1375.DATAA
FLTR_WHL_DIR <= ix1376_lc.DB_MAX_OUTPUT_PORT_TYPE
FLTR_WHL_EN <= <VCC>
FLTR_WHL_HOLD <= ix1375.DB_MAX_OUTPUT_PORT_TYPE
FLTR_WHL_RST <= RESET.DB_MAX_OUTPUT_PORT_TYPE
FLTR_WHL_STEP <= reg_FLTR_WHL_STEP.DB_MAX_OUTPUT_PORT_TYPE
RESET => FLTR_WHL_RST.DATAIN
RESET => ix1270.DATAD
RESET => ix1273.DATAC
RESET => ix1355.DATAC
RESET => ix1356.DATAC
RESET => ix1357.DATAC
RESET => ix1358.DATAC
RESET => ix1359.DATAC
RESET => ix1360.DATAC
RESET => ix1361.DATAC
RESET => ix1362.DATAC
TPUINPUTS[0] => reg_TPUINPUTS_SYNC1_0.DATAIN
TPUINPUTS[0] => ix1358.DATAA
TPUINPUTS[0] => ix1362.DATAA
TPUINPUTS[1] => reg_TPUINPUTS_SYNC1_1.DATAIN
TPUINPUTS[1] => ix1357.DATAA
TPUINPUTS[1] => ix1361.DATAA
TPUINPUTS[2] => reg_TPUINPUTS_SYNC1_2.DATAIN
TPUINPUTS[2] => ix1356.DATAA
TPUINPUTS[2] => ix1360.DATAA
TPUINPUTS[3] => reg_TPUINPUTS_SYNC1_3.DATAIN
TPUINPUTS[3] => ix1355.DATAA
TPUINPUTS[3] => ix1359.DATAA


|top_level|PWM_CNTRL_notri:I8_notri
CNT_CLOCK => LPM_COUNTER:PWMCOUNT_ix7.clock
DATARDY => ix243.DATAC
DATARDY => ix244.DATAD
DATARDY => ix245.DATAD
DATARDY => ix246.DATAD
DATARDY => ix247.DATAD
DATARDY => ix248.DATAD
DATARDY => ix249.DATAD
DATARDY => ix250.DATAD
DATARDY => ix251.DATAD
DATARDY => ix252.DATAD
DATARDY => ix253.DATAD
DATARDY => ix254.DATAD
DATARDY => ix255.DATAD
DATARDY => ix256.DATAD
DATARDY => ix257.DATAD
DATARDY => ix258.DATAD
DATARDY => ix259.DATAB
DATARDY => ix260.DATAA
DATARDY => ix261.DATAB
DATARDY => ix262.DATAB
DATARDY => ix263.DATAB
DATARDY => ix264.DATAB
DATARDY => ix265.DATAB
DATARDY => ix266.DATAB
DATARDY => ix267.DATAB
DATARDY => ix268.DATAB
DATARDY => ix269.DATAB
DATARDY => ix270.DATAB
DATARDY => ix271.DATAB
DATARDY => ix272.DATAB
DATARDY => ix273.DATAB
DATARDY => ix274.DATAB
DATARDY => ix275.DATAB
DATARDY => ix276.DATAC
DATARDY => ix277.DATAC
DATARDY => ix278.DATAC
DATARDY => ix279.DATAC
DATARDY => ix280.DATAC
DATARDY => ix281.DATAC
DATARDY => ix282.DATAC
DATARDY => ix283.DATAC
DATARDY => ix284.DATAC
DATARDY => ix285.DATAC
DATARDY => ix286.DATAC
DATARDY => ix287.DATAC
DATARDY => ix288.DATAC
DATARDY => ix289.DATAC
DATARDY => ix290.DATAC
NOT_TRI_REG <= ix307.DB_MAX_OUTPUT_PORT_TYPE
nx449 <= modgen_gt_450_ix67_carry_sum.DB_MAX_OUTPUT_PORT_TYPE
PWM_DCYCLE_CNT[0] => modgen_gt_447_ix67.DATAC
PWM_DCYCLE_CNT[0] => ix243.DATAB
PWM_DCYCLE_CNT[1] => modgen_gt_447_ix65.DATAC
PWM_DCYCLE_CNT[1] => ix244.DATAC
PWM_DCYCLE_CNT[2] => modgen_gt_447_ix63.DATAC
PWM_DCYCLE_CNT[2] => ix245.DATAC
PWM_DCYCLE_CNT[3] => modgen_gt_447_ix61.DATAC
PWM_DCYCLE_CNT[3] => ix246.DATAC
PWM_DCYCLE_CNT[4] => modgen_gt_447_ix59.DATAC
PWM_DCYCLE_CNT[4] => ix247.DATAC
PWM_DCYCLE_CNT[5] => modgen_gt_447_ix57.DATAC
PWM_DCYCLE_CNT[5] => ix248.DATAC
PWM_DCYCLE_CNT[6] => modgen_gt_447_ix55.DATAC
PWM_DCYCLE_CNT[6] => ix249.DATAC
PWM_DCYCLE_CNT[7] => modgen_gt_447_ix53.DATAC
PWM_DCYCLE_CNT[7] => ix250.DATAC
PWM_DCYCLE_CNT[8] => modgen_gt_447_ix51.DATAC
PWM_DCYCLE_CNT[8] => ix251.DATAC
PWM_DCYCLE_CNT[9] => modgen_gt_447_ix49.DATAC
PWM_DCYCLE_CNT[9] => ix252.DATAC
PWM_DCYCLE_CNT[10] => modgen_gt_447_ix47.DATAC
PWM_DCYCLE_CNT[10] => ix253.DATAC
PWM_DCYCLE_CNT[11] => modgen_gt_447_ix45.DATAC
PWM_DCYCLE_CNT[11] => ix254.DATAC
PWM_DCYCLE_CNT[12] => modgen_gt_447_ix43.DATAC
PWM_DCYCLE_CNT[12] => ix255.DATAC
PWM_DCYCLE_CNT[13] => modgen_gt_447_ix41.DATAC
PWM_DCYCLE_CNT[13] => ix256.DATAC
PWM_DCYCLE_CNT[14] => modgen_gt_447_ix39.DATAC
PWM_DCYCLE_CNT[14] => ix257.DATAC
PWM_DCYCLE_CNT[15] => modgen_gt_447_ix37.DATAB
PWM_DCYCLE_CNT[15] => ix258.DATAC
PWM_FREQ_CNT[0] => ix275.DATAA
PWM_FREQ_CNT[1] => ix276.DATAA
PWM_FREQ_CNT[2] => ix277.DATAA
PWM_FREQ_CNT[3] => ix278.DATAA
PWM_FREQ_CNT[4] => ix279.DATAA
PWM_FREQ_CNT[5] => ix280.DATAA
PWM_FREQ_CNT[6] => ix281.DATAA
PWM_FREQ_CNT[7] => ix282.DATAA
PWM_FREQ_CNT[8] => ix283.DATAA
PWM_FREQ_CNT[9] => ix284.DATAA
PWM_FREQ_CNT[10] => ix285.DATAA
PWM_FREQ_CNT[11] => ix286.DATAA
PWM_FREQ_CNT[12] => ix287.DATAA
PWM_FREQ_CNT[13] => ix288.DATAA
PWM_FREQ_CNT[14] => ix289.DATAA
PWM_FREQ_CNT[15] => ix290.DATAA
RESET => ix242.DATAA
SYSCLOCK => reg_B_PWM_FREQ_CNT_15.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_14.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_13.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_12.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_11.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_10.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_9.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_8.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_7.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_6.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_5.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_4.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_3.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_2.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_1.CLK
SYSCLOCK => reg_B_PWM_FREQ_CNT_0.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_15.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_14.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_13.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_12.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_11.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_10.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_9.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_8.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_7.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_6.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_5.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_4.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_3.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_2.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_1.CLK
SYSCLOCK => reg_B_PWM_DCYCLE_CNT_0.CLK
TRI_REG => ix307.DATAA


|top_level|PWM_CNTRL_notri:I8_notri|LPM_COUNTER:PWMCOUNT_ix7
clock => alt_counter_f10ke:wysi_counter.clock
sclr => alt_counter_f10ke:wysi_counter.sclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
q[2] <= alt_counter_f10ke:wysi_counter.q[2]
q[3] <= alt_counter_f10ke:wysi_counter.q[3]
q[4] <= alt_counter_f10ke:wysi_counter.q[4]
q[5] <= alt_counter_f10ke:wysi_counter.q[5]
q[6] <= alt_counter_f10ke:wysi_counter.q[6]
q[7] <= alt_counter_f10ke:wysi_counter.q[7]
q[8] <= alt_counter_f10ke:wysi_counter.q[8]
q[9] <= alt_counter_f10ke:wysi_counter.q[9]
q[10] <= alt_counter_f10ke:wysi_counter.q[10]
q[11] <= alt_counter_f10ke:wysi_counter.q[11]
q[12] <= alt_counter_f10ke:wysi_counter.q[12]
q[13] <= alt_counter_f10ke:wysi_counter.q[13]
q[14] <= alt_counter_f10ke:wysi_counter.q[14]
q[15] <= alt_counter_f10ke:wysi_counter.q[15]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|PWM_CNTRL_notri:I8_notri|LPM_COUNTER:PWMCOUNT_ix7|alt_counter_f10ke:wysi_counter
data[0] => counter_cell[0].DATAC
data[1] => counter_cell[1].DATAC
data[2] => counter_cell[2].DATAC
data[3] => counter_cell[3].DATAC
data[4] => counter_cell[4].DATAC
data[5] => counter_cell[5].DATAC
data[6] => counter_cell[6].DATAC
data[7] => counter_cell[7].DATAC
data[8] => counter_cell[8].DATAC
data[9] => counter_cell[9].DATAC
data[10] => counter_cell[10].DATAC
data[11] => counter_cell[11].DATAC
data[12] => counter_cell[12].DATAC
data[13] => counter_cell[13].DATAC
data[14] => counter_cell[14].DATAC
data[15] => counter_cell[15].DATAC
clock => counter_cell[15].CLK
clock => counter_cell[14].CLK
clock => counter_cell[13].CLK
clock => counter_cell[12].CLK
clock => counter_cell[11].CLK
clock => counter_cell[10].CLK
clock => counter_cell[9].CLK
clock => counter_cell[8].CLK
clock => counter_cell[7].CLK
clock => counter_cell[6].CLK
clock => counter_cell[5].CLK
clock => counter_cell[4].CLK
clock => counter_cell[3].CLK
clock => counter_cell[2].CLK
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
q[2] <= counter_cell[2].REGOUT
q[3] <= counter_cell[3].REGOUT
q[4] <= counter_cell[4].REGOUT
q[5] <= counter_cell[5].REGOUT
q[6] <= counter_cell[6].REGOUT
q[7] <= counter_cell[7].REGOUT
q[8] <= counter_cell[8].REGOUT
q[9] <= counter_cell[9].REGOUT
q[10] <= counter_cell[10].REGOUT
q[11] <= counter_cell[11].REGOUT
q[12] <= counter_cell[12].REGOUT
q[13] <= counter_cell[13].REGOUT
q[14] <= counter_cell[14].REGOUT
q[15] <= counter_cell[15].REGOUT
cout <= cout_bit.COMBOUT


|top_level|LPM_COUNTER:mw_I28reg_cval_ix8
clock => alt_counter_f10ke:wysi_counter.clock
aclr => alt_counter_f10ke:wysi_counter.aclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|LPM_COUNTER:mw_I28reg_cval_ix8|alt_counter_f10ke:wysi_counter
data[0] => data_path[0].IN1
data[1] => data_path[1].IN1
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
aclr => counter_cell[1].ACLR
aclr => counter_cell[0].ACLR
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
cout <= cout_bit.COMBOUT


|top_level|LPM_COUNTER:mw_I30reg_cval_ix8
clock => alt_counter_f10ke:wysi_counter.clock
aclr => alt_counter_f10ke:wysi_counter.aclr
q[0] <= alt_counter_f10ke:wysi_counter.q[0]
q[1] <= alt_counter_f10ke:wysi_counter.q[1]
cout <= alt_counter_f10ke:wysi_counter.cout


|top_level|LPM_COUNTER:mw_I30reg_cval_ix8|alt_counter_f10ke:wysi_counter
data[0] => data_path[0].IN1
data[1] => data_path[1].IN1
clock => counter_cell[1].CLK
clock => counter_cell[0].CLK
aclr => counter_cell[1].ACLR
aclr => counter_cell[0].ACLR
q[0] <= counter_cell[0].REGOUT
q[1] <= counter_cell[1].REGOUT
cout <= cout_bit.COMBOUT


